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core/i2c/i2c.c
706
core/i2c/i2c.c
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@ -1,353 +1,353 @@
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/*****************************************************************************
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/*****************************************************************************
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* i2c.c: I2C C file for NXP LPC11xx/13xx Family Microprocessors
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* i2c.c: I2C C file for NXP LPC11xx/13xx Family Microprocessors
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*
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*
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* Copyright(C) 2008, NXP Semiconductor
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* Copyright(C) 2008, NXP Semiconductor
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* Parts of this code are (C) 2010, MyVoice CAD/CAM Services
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* Parts of this code are (C) 2010, MyVoice CAD/CAM Services
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* All rights reserved.
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* All rights reserved.
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*
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*
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* History
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* History
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* 2009.12.07 ver 1.00 Preliminary version, first Release
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* 2009.12.07 ver 1.00 Preliminary version, first Release
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* 2010.07.19 ver 1.10 Rob Jansen - MyVoice CAD/CAM Services:
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* 2010.07.19 ver 1.10 Rob Jansen - MyVoice CAD/CAM Services:
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* Major cleaning and a rewrite of some functions
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* Major cleaning and a rewrite of some functions
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* - adding ACK/NACK handling to the state machine
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* - adding ACK/NACK handling to the state machine
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* - adding a return result to the I2CEngine()
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* - adding a return result to the I2CEngine()
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*
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*
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*****************************************************************************/
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*****************************************************************************/
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#include "i2c.h"
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#include "i2c.h"
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volatile uint32_t I2CMasterState = I2CSTATE_IDLE;
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volatile uint32_t I2CMasterState = I2CSTATE_IDLE;
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volatile uint32_t I2CSlaveState = I2CSTATE_IDLE;
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volatile uint32_t I2CSlaveState = I2CSTATE_IDLE;
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volatile uint8_t I2CMasterBuffer[I2C_BUFSIZE];
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volatile uint8_t I2CMasterBuffer[I2C_BUFSIZE];
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volatile uint8_t I2CSlaveBuffer[I2C_BUFSIZE];
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volatile uint8_t I2CSlaveBuffer[I2C_BUFSIZE];
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volatile uint32_t I2CReadLength;
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volatile uint32_t I2CReadLength;
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volatile uint32_t I2CWriteLength;
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volatile uint32_t I2CWriteLength;
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volatile uint32_t RdIndex = 0;
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volatile uint32_t RdIndex = 0;
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volatile uint32_t WrIndex = 0;
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volatile uint32_t WrIndex = 0;
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/*****************************************************************************
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/*****************************************************************************
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** Function name: I2C_IRQHandler
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** Function name: I2C_IRQHandler
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**
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**
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** Descriptions: I2C interrupt handler, deal with master mode only.
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** Descriptions: I2C interrupt handler, deal with master mode only.
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**
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**
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** parameters: None
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** parameters: None
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** Returned value: None
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** Returned value: None
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**
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**
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*****************************************************************************/
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*****************************************************************************/
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void I2C_IRQHandler(void)
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void I2C_IRQHandler(void)
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{
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{
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uint8_t StatValue;
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uint8_t StatValue;
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/* this handler deals with master read and master write only */
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/* this handler deals with master read and master write only */
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StatValue = I2C_I2CSTAT;
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StatValue = I2C_I2CSTAT;
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switch ( StatValue )
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switch ( StatValue )
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{
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{
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case 0x08:
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case 0x08:
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/*
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/*
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* A START condition has been transmitted.
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* A START condition has been transmitted.
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* We now send the slave address and initialize
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* We now send the slave address and initialize
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* the write buffer
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* the write buffer
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* (we always start with a write after START+SLA)
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* (we always start with a write after START+SLA)
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*/
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*/
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WrIndex = 0;
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WrIndex = 0;
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CCONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
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I2C_I2CCONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
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I2CMasterState = I2CSTATE_PENDING;
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I2CMasterState = I2CSTATE_PENDING;
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break;
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break;
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case 0x10:
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case 0x10:
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/*
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/*
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* A repeated START condition has been transmitted.
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* A repeated START condition has been transmitted.
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* Now a second, read, transaction follows so we
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* Now a second, read, transaction follows so we
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* initialize the read buffer.
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* initialize the read buffer.
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*/
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*/
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RdIndex = 0;
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RdIndex = 0;
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/* Send SLA with R bit set, */
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/* Send SLA with R bit set, */
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CCONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
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I2C_I2CCONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
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break;
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break;
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case 0x18:
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case 0x18:
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/*
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/*
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* SLA+W has been transmitted; ACK has been received.
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* SLA+W has been transmitted; ACK has been received.
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* We now start writing bytes.
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* We now start writing bytes.
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*/
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*/
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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case 0x20:
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case 0x20:
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/*
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/*
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* SLA+W has been transmitted; NOT ACK has been received.
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* SLA+W has been transmitted; NOT ACK has been received.
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* Send a stop condition to terminate the transaction
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* Send a stop condition to terminate the transaction
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* and signal I2CEngine the transaction is aborted.
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* and signal I2CEngine the transaction is aborted.
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*/
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*/
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2CMasterState = I2CSTATE_SLA_NACK;
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I2CMasterState = I2CSTATE_SLA_NACK;
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break;
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break;
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case 0x28:
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case 0x28:
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/*
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/*
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* Data in I2DAT has been transmitted; ACK has been received.
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* Data in I2DAT has been transmitted; ACK has been received.
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* Continue sending more bytes as long as there are bytes to send
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* Continue sending more bytes as long as there are bytes to send
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* and after this check if a read transaction should follow.
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* and after this check if a read transaction should follow.
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*/
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*/
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if ( WrIndex < I2CWriteLength )
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if ( WrIndex < I2CWriteLength )
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{
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{
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/* Keep writing as long as bytes avail */
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/* Keep writing as long as bytes avail */
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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I2C_I2CDAT = I2CMasterBuffer[WrIndex++];
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}
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}
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else
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else
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{
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{
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if ( I2CReadLength != 0 )
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if ( I2CReadLength != 0 )
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{
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{
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/* Send a Repeated START to initialize a read transaction */
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/* Send a Repeated START to initialize a read transaction */
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/* (handled in state 0x10) */
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/* (handled in state 0x10) */
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I2C_I2CCONSET = I2CONSET_STA; /* Set Repeated-start flag */
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I2C_I2CCONSET = I2CONSET_STA; /* Set Repeated-start flag */
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}
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}
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else
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else
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{
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{
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I2CMasterState = I2CSTATE_ACK;
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I2CMasterState = I2CSTATE_ACK;
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I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
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I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
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}
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}
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}
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}
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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case 0x30:
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case 0x30:
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/*
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/*
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* Data byte in I2DAT has been transmitted; NOT ACK has been received
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* Data byte in I2DAT has been transmitted; NOT ACK has been received
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* Send a STOP condition to terminate the transaction and inform the
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* Send a STOP condition to terminate the transaction and inform the
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* I2CEngine that the transaction failed.
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* I2CEngine that the transaction failed.
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*/
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*/
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2CMasterState = I2CSTATE_NACK;
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I2CMasterState = I2CSTATE_NACK;
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break;
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break;
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case 0x38:
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case 0x38:
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/*
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/*
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* Arbitration loss in SLA+R/W or Data bytes.
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* Arbitration loss in SLA+R/W or Data bytes.
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* This is a fatal condition, the transaction did not complete due
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* This is a fatal condition, the transaction did not complete due
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* to external reasons (e.g. hardware system failure).
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* to external reasons (e.g. hardware system failure).
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* Inform the I2CEngine of this and cancel the transaction
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* Inform the I2CEngine of this and cancel the transaction
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* (this is automatically done by the I2C hardware)
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* (this is automatically done by the I2C hardware)
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*/
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*/
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I2CMasterState = I2CSTATE_ARB_LOSS;
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I2CMasterState = I2CSTATE_ARB_LOSS;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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case 0x40:
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case 0x40:
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/*
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/*
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* SLA+R has been transmitted; ACK has been received.
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* SLA+R has been transmitted; ACK has been received.
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* Initialize a read.
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* Initialize a read.
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* Since a NOT ACK is sent after reading the last byte,
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* Since a NOT ACK is sent after reading the last byte,
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* we need to prepare a NOT ACK in case we only read 1 byte.
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* we need to prepare a NOT ACK in case we only read 1 byte.
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*/
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*/
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if ( I2CReadLength == 1 )
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if ( I2CReadLength == 1 )
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{
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{
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/* last (and only) byte: send a NACK after data is received */
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/* last (and only) byte: send a NACK after data is received */
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I2C_I2CCONCLR = I2CONCLR_AAC;
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I2C_I2CCONCLR = I2CONCLR_AAC;
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}
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}
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else
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else
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{
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{
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/* more bytes to follow: send an ACK after data is received */
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/* more bytes to follow: send an ACK after data is received */
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I2C_I2CCONSET = I2CONSET_AA;
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I2C_I2CCONSET = I2CONSET_AA;
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}
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}
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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case 0x48:
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case 0x48:
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/*
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/*
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* SLA+R has been transmitted; NOT ACK has been received.
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* SLA+R has been transmitted; NOT ACK has been received.
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* Send a stop condition to terminate the transaction
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* Send a stop condition to terminate the transaction
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* and signal I2CEngine the transaction is aborted.
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* and signal I2CEngine the transaction is aborted.
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*/
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*/
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONSET = I2CONSET_STO;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2CMasterState = I2CSTATE_SLA_NACK;
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I2CMasterState = I2CSTATE_SLA_NACK;
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break;
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break;
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case 0x50:
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case 0x50:
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/*
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/*
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* Data byte has been received; ACK has been returned.
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* Data byte has been received; ACK has been returned.
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* Read the byte and check for more bytes to read.
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* Read the byte and check for more bytes to read.
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* Send a NOT ACK after the last byte is received
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* Send a NOT ACK after the last byte is received
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*/
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*/
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I2CSlaveBuffer[RdIndex++] = I2C_I2CDAT;
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I2CSlaveBuffer[RdIndex++] = I2C_I2CDAT;
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if ( RdIndex < (I2CReadLength-1) )
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if ( RdIndex < (I2CReadLength-1) )
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{
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{
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/* lmore bytes to follow: send an ACK after data is received */
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/* lmore bytes to follow: send an ACK after data is received */
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I2C_I2CCONSET = I2CONSET_AA;
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I2C_I2CCONSET = I2CONSET_AA;
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}
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}
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else
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else
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{
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{
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/* last byte: send a NACK after data is received */
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/* last byte: send a NACK after data is received */
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I2C_I2CCONCLR = I2CONCLR_AAC;
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I2C_I2CCONCLR = I2CONCLR_AAC;
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}
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}
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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case 0x58:
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case 0x58:
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/*
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/*
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* Data byte has been received; NOT ACK has been returned.
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* Data byte has been received; NOT ACK has been returned.
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* This is the last byte to read.
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* This is the last byte to read.
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* Generate a STOP condition and flag the I2CEngine that the
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* Generate a STOP condition and flag the I2CEngine that the
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* transaction is finished.
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* transaction is finished.
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*/
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*/
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I2CSlaveBuffer[RdIndex++] = I2C_I2CDAT;
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I2CSlaveBuffer[RdIndex++] = I2C_I2CDAT;
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I2CMasterState = I2CSTATE_ACK;
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I2CMasterState = I2CSTATE_ACK;
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I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
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I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
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I2C_I2CCONCLR = I2CONCLR_SIC; /* Clear SI flag */
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I2C_I2CCONCLR = I2CONCLR_SIC; /* Clear SI flag */
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break;
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break;
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default:
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default:
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I2C_I2CCONCLR = I2CONCLR_SIC;
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I2C_I2CCONCLR = I2CONCLR_SIC;
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break;
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break;
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}
|
}
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return;
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return;
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}
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}
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/*****************************************************************************
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/*****************************************************************************
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** Function name: I2CStart
|
** Function name: I2CStart
|
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**
|
**
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** Descriptions: Create I2C start condition, a timeout
|
** Descriptions: Create I2C start condition, a timeout
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** value is set if the I2C never gets started,
|
** value is set if the I2C never gets started,
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** and timed out. It's a fatal error.
|
** and timed out. It's a fatal error.
|
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**
|
**
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** parameters: None
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** parameters: None
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** Returned value: true or false, return false if timed out
|
** Returned value: true or false, return false if timed out
|
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**
|
**
|
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*****************************************************************************/
|
*****************************************************************************/
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static uint32_t I2CStart( void )
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static uint32_t I2CStart( void )
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{
|
{
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uint32_t timeout = 0;
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uint32_t timeout = 0;
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/*--- Issue a start condition ---*/
|
/*--- Issue a start condition ---*/
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I2C_I2CCONSET = I2CONSET_STA; /* Set Start flag */
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I2C_I2CCONSET = I2CONSET_STA; /* Set Start flag */
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while((I2CMasterState != I2CSTATE_PENDING) && (timeout < MAX_TIMEOUT))
|
while((I2CMasterState != I2CSTATE_PENDING) && (timeout < MAX_TIMEOUT))
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{
|
{
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timeout++;
|
timeout++;
|
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}
|
}
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|
|
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return (timeout < MAX_TIMEOUT);
|
return (timeout < MAX_TIMEOUT);
|
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}
|
}
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||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
** Function name: I2CStop
|
** Function name: I2CStop
|
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**
|
**
|
||||||
** Descriptions: Set the I2C stop condition
|
** Descriptions: Set the I2C stop condition
|
||||||
**
|
**
|
||||||
** parameters: None
|
** parameters: None
|
||||||
** Returned value: true or never return
|
** Returned value: true or never return
|
||||||
**
|
**
|
||||||
*****************************************************************************/
|
*****************************************************************************/
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static uint32_t I2CStop( void )
|
static uint32_t I2CStop( void )
|
||||||
{
|
{
|
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uint32_t timeout = 0;
|
uint32_t timeout = 0;
|
||||||
|
|
||||||
I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
|
I2C_I2CCONSET = I2CONSET_STO; /* Set Stop flag */
|
||||||
I2C_I2CCONCLR = I2CONCLR_SIC; /* Clear SI flag */
|
I2C_I2CCONCLR = I2CONCLR_SIC; /* Clear SI flag */
|
||||||
|
|
||||||
/*--- Wait for STOP detected ---*/
|
/*--- Wait for STOP detected ---*/
|
||||||
while((I2C_I2CCONSET & I2CONSET_STO) && (timeout < MAX_TIMEOUT))
|
while((I2C_I2CCONSET & I2CONSET_STO) && (timeout < MAX_TIMEOUT))
|
||||||
{
|
{
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
return (timeout >= MAX_TIMEOUT);
|
return (timeout >= MAX_TIMEOUT);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
** Function name: I2CInit
|
** Function name: I2CInit
|
||||||
**
|
**
|
||||||
** Descriptions: Initialize I2C controller
|
** Descriptions: Initialize I2C controller
|
||||||
**
|
**
|
||||||
** parameters: I2c mode is either MASTER or SLAVE
|
** parameters: I2c mode is either MASTER or SLAVE
|
||||||
** Returned value: true or false, return false if the I2C
|
** Returned value: true or false, return false if the I2C
|
||||||
** interrupt handler was not installed correctly
|
** interrupt handler was not installed correctly
|
||||||
**
|
**
|
||||||
*****************************************************************************/
|
*****************************************************************************/
|
||||||
uint32_t i2cInit( uint32_t I2cMode )
|
uint32_t i2cInit( uint32_t I2cMode )
|
||||||
{
|
{
|
||||||
SCB_PRESETCTRL |= (0x1<<1);
|
SCB_PRESETCTRL |= (0x1<<1);
|
||||||
|
|
||||||
// Enable I2C clock
|
// Enable I2C clock
|
||||||
SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_I2C);
|
SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_I2C);
|
||||||
|
|
||||||
// Configure pin 0.4 for SCL
|
// Configure pin 0.4 for SCL
|
||||||
IOCON_PIO0_4 &= ~(IOCON_PIO0_4_FUNC_MASK | IOCON_PIO0_4_I2CMODE_MASK);
|
IOCON_PIO0_4 &= ~(IOCON_PIO0_4_FUNC_MASK | IOCON_PIO0_4_I2CMODE_MASK);
|
||||||
IOCON_PIO0_4 |= (IOCON_PIO0_4_FUNC_I2CSCL);
|
IOCON_PIO0_4 |= (IOCON_PIO0_4_FUNC_I2CSCL);
|
||||||
|
|
||||||
// Configure pin 0.5 for SDA
|
// Configure pin 0.5 for SDA
|
||||||
IOCON_PIO0_5 &= ~(IOCON_PIO0_5_FUNC_MASK | IOCON_PIO0_5_I2CMODE_MASK);
|
IOCON_PIO0_5 &= ~(IOCON_PIO0_5_FUNC_MASK | IOCON_PIO0_5_I2CMODE_MASK);
|
||||||
IOCON_PIO0_5 |= IOCON_PIO0_5_FUNC_I2CSDA;
|
IOCON_PIO0_5 |= IOCON_PIO0_5_FUNC_I2CSDA;
|
||||||
|
|
||||||
// Clear flags
|
// Clear flags
|
||||||
I2C_I2CCONCLR = I2C_I2CCONCLR_AAC |
|
I2C_I2CCONCLR = I2C_I2CCONCLR_AAC |
|
||||||
I2C_I2CCONCLR_SIC |
|
I2C_I2CCONCLR_SIC |
|
||||||
I2C_I2CCONCLR_STAC |
|
I2C_I2CCONCLR_STAC |
|
||||||
I2C_I2CCONCLR_I2ENC;
|
I2C_I2CCONCLR_I2ENC;
|
||||||
|
|
||||||
// See p.128 for appropriate values for SCLL and SCLH
|
// See p.128 for appropriate values for SCLL and SCLH
|
||||||
#if I2C_FAST_MODE_PLUS
|
#if I2C_FAST_MODE_PLUS
|
||||||
IOCON_PIO0_4 |= (IOCON_PIO0_4_I2CMODE_FASTPLUSI2C);
|
IOCON_PIO0_4 |= (IOCON_PIO0_4_I2CMODE_FASTPLUSI2C);
|
||||||
IOCON_PIO0_5 |= (IOCON_PIO0_5_I2CMODE_FASTPLUSI2C);
|
IOCON_PIO0_5 |= (IOCON_PIO0_5_I2CMODE_FASTPLUSI2C);
|
||||||
I2C_I2CSCLL = I2C_SCLL_HS_SCLL;
|
I2C_I2CSCLL = I2C_SCLL_HS_SCLL;
|
||||||
I2C_I2CSCLH = I2C_SCLH_HS_SCLH;
|
I2C_I2CSCLH = I2C_SCLH_HS_SCLH;
|
||||||
#else
|
#else
|
||||||
I2C_I2CSCLL = I2SCLL_SCLL;
|
I2C_I2CSCLL = I2SCLL_SCLL;
|
||||||
I2C_I2CSCLH = I2SCLH_SCLH;
|
I2C_I2CSCLH = I2SCLH_SCLH;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if ( I2cMode == I2CSLAVE )
|
if ( I2cMode == I2CSLAVE )
|
||||||
{
|
{
|
||||||
I2C_I2CADR0 = SLAVE_ADDR;
|
I2C_I2CADR0 = SLAVE_ADDR;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Enable the I2C Interrupt */
|
/* Enable the I2C Interrupt */
|
||||||
NVIC_EnableIRQ(I2C_IRQn);
|
NVIC_EnableIRQ(I2C_IRQn);
|
||||||
I2C_I2CCONSET = I2C_I2CCONSET_I2EN;
|
I2C_I2CCONSET = I2C_I2CCONSET_I2EN;
|
||||||
|
|
||||||
return( TRUE );
|
return( TRUE );
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
** Function name: I2CEngine
|
** Function name: I2CEngine
|
||||||
**
|
**
|
||||||
** Descriptions: The routine to complete a I2C transaction
|
** Descriptions: The routine to complete a I2C transaction
|
||||||
** from start to stop. All the intermitten
|
** from start to stop. All the intermitten
|
||||||
** steps are handled in the interrupt handler.
|
** steps are handled in the interrupt handler.
|
||||||
** Before this routine is called, the read
|
** Before this routine is called, the read
|
||||||
** length, write length and I2C master buffer
|
** length, write length and I2C master buffer
|
||||||
** need to be filled.
|
** need to be filled.
|
||||||
**
|
**
|
||||||
** parameters: None
|
** parameters: None
|
||||||
** Returned value: Any of the I2CSTATE_... values. See i2c.h
|
** Returned value: Any of the I2CSTATE_... values. See i2c.h
|
||||||
**
|
**
|
||||||
*****************************************************************************/
|
*****************************************************************************/
|
||||||
uint32_t i2cEngine( void )
|
uint32_t i2cEngine( void )
|
||||||
{
|
{
|
||||||
I2CMasterState = I2CSTATE_IDLE;
|
I2CMasterState = I2CSTATE_IDLE;
|
||||||
RdIndex = 0;
|
RdIndex = 0;
|
||||||
WrIndex = 0;
|
WrIndex = 0;
|
||||||
if ( I2CStart() != TRUE )
|
if ( I2CStart() != TRUE )
|
||||||
{
|
{
|
||||||
I2CStop();
|
I2CStop();
|
||||||
return ( FALSE );
|
return ( FALSE );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* wait until the state is a terminal state */
|
/* wait until the state is a terminal state */
|
||||||
while (I2CMasterState < 0x100);
|
while (I2CMasterState < 0x100);
|
||||||
|
|
||||||
return ( I2CMasterState );
|
return ( I2CMasterState );
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
** End Of File
|
** End Of File
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
|
|
|
||||||
166
core/i2c/i2c.h
166
core/i2c/i2c.h
|
|
@ -1,83 +1,83 @@
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
* i2c.h: Header file for NXP LPC11xx Family Microprocessors
|
* i2c.h: Header file for NXP LPC11xx Family Microprocessors
|
||||||
*
|
*
|
||||||
* Copyright(C) 2006, NXP Semiconductor
|
* Copyright(C) 2006, NXP Semiconductor
|
||||||
* Parts of this code are (C) 2010, MyVoice CAD/CAM Services
|
* Parts of this code are (C) 2010, MyVoice CAD/CAM Services
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* History
|
* History
|
||||||
* 2006.07.19 ver 1.00 Preliminary version, first Release
|
* 2006.07.19 ver 1.00 Preliminary version, first Release
|
||||||
* 2010.07.19 ver 1.10 Rob Jansen - MyVoice CAD/CAM Services
|
* 2010.07.19 ver 1.10 Rob Jansen - MyVoice CAD/CAM Services
|
||||||
* Updated to reflect new code
|
* Updated to reflect new code
|
||||||
*
|
*
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
#ifndef __I2C_H
|
#ifndef __I2C_H
|
||||||
#define __I2C_H
|
#define __I2C_H
|
||||||
|
|
||||||
#include "projectconfig.h"
|
#include "projectconfig.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* These are states returned by the I2CEngine:
|
* These are states returned by the I2CEngine:
|
||||||
*
|
*
|
||||||
* IDLE - is never returned but only used internally
|
* IDLE - is never returned but only used internally
|
||||||
* PENDING - is never returned but only used internally in the I2C functions
|
* PENDING - is never returned but only used internally in the I2C functions
|
||||||
* ACK - The transaction finished and the slave returned ACK (on all bytes)
|
* ACK - The transaction finished and the slave returned ACK (on all bytes)
|
||||||
* NACK - The transaction is aborted since the slave returned a NACK
|
* NACK - The transaction is aborted since the slave returned a NACK
|
||||||
* SLA_NACK - The transaction is aborted since the slave returned a NACK on the SLA
|
* SLA_NACK - The transaction is aborted since the slave returned a NACK on the SLA
|
||||||
* this can be intentional (e.g. an 24LC08 EEPROM states it is busy)
|
* this can be intentional (e.g. an 24LC08 EEPROM states it is busy)
|
||||||
* or the slave is not available/accessible at all.
|
* or the slave is not available/accessible at all.
|
||||||
* ARB_LOSS - Arbitration loss during any part of the transaction.
|
* ARB_LOSS - Arbitration loss during any part of the transaction.
|
||||||
* This could only happen in a multi master system or could also
|
* This could only happen in a multi master system or could also
|
||||||
* identify a hardware problem in the system.
|
* identify a hardware problem in the system.
|
||||||
*/
|
*/
|
||||||
#define I2CSTATE_IDLE 0x000
|
#define I2CSTATE_IDLE 0x000
|
||||||
#define I2CSTATE_PENDING 0x001
|
#define I2CSTATE_PENDING 0x001
|
||||||
#define I2CSTATE_ACK 0x101
|
#define I2CSTATE_ACK 0x101
|
||||||
#define I2CSTATE_NACK 0x102
|
#define I2CSTATE_NACK 0x102
|
||||||
#define I2CSTATE_SLA_NACK 0x103
|
#define I2CSTATE_SLA_NACK 0x103
|
||||||
#define I2CSTATE_ARB_LOSS 0x104
|
#define I2CSTATE_ARB_LOSS 0x104
|
||||||
|
|
||||||
#define FAST_MODE_PLUS 0
|
#define FAST_MODE_PLUS 0
|
||||||
|
|
||||||
#define I2C_BUFSIZE 6
|
#define I2C_BUFSIZE 6
|
||||||
#define MAX_TIMEOUT 0x00FFFFFF
|
#define MAX_TIMEOUT 0x00FFFFFF
|
||||||
|
|
||||||
#define I2CMASTER 0x01
|
#define I2CMASTER 0x01
|
||||||
#define I2CSLAVE 0x02
|
#define I2CSLAVE 0x02
|
||||||
|
|
||||||
#define SLAVE_ADDR 0xA0
|
#define SLAVE_ADDR 0xA0
|
||||||
#define READ_WRITE 0x01
|
#define READ_WRITE 0x01
|
||||||
|
|
||||||
#define RD_BIT 0x01
|
#define RD_BIT 0x01
|
||||||
|
|
||||||
#define I2CONSET_I2EN 0x00000040 /* I2C Control Set Register */
|
#define I2CONSET_I2EN 0x00000040 /* I2C Control Set Register */
|
||||||
#define I2CONSET_AA 0x00000004
|
#define I2CONSET_AA 0x00000004
|
||||||
#define I2CONSET_SI 0x00000008
|
#define I2CONSET_SI 0x00000008
|
||||||
#define I2CONSET_STO 0x00000010
|
#define I2CONSET_STO 0x00000010
|
||||||
#define I2CONSET_STA 0x00000020
|
#define I2CONSET_STA 0x00000020
|
||||||
|
|
||||||
#define I2CONCLR_AAC 0x00000004 /* I2C Control clear Register */
|
#define I2CONCLR_AAC 0x00000004 /* I2C Control clear Register */
|
||||||
#define I2CONCLR_SIC 0x00000008
|
#define I2CONCLR_SIC 0x00000008
|
||||||
#define I2CONCLR_STAC 0x00000020
|
#define I2CONCLR_STAC 0x00000020
|
||||||
#define I2CONCLR_I2ENC 0x00000040
|
#define I2CONCLR_I2ENC 0x00000040
|
||||||
|
|
||||||
#define I2DAT_I2C 0x00000000 /* I2C Data Reg */
|
#define I2DAT_I2C 0x00000000 /* I2C Data Reg */
|
||||||
#define I2ADR_I2C 0x00000000 /* I2C Slave Address Reg */
|
#define I2ADR_I2C 0x00000000 /* I2C Slave Address Reg */
|
||||||
#define I2SCLH_SCLH 120 /* I2C SCL Duty Cycle High Reg */
|
#define I2SCLH_SCLH 120 /* I2C SCL Duty Cycle High Reg */
|
||||||
#define I2SCLL_SCLL 120 /* I2C SCL Duty Cycle Low Reg */
|
#define I2SCLL_SCLL 120 /* I2C SCL Duty Cycle Low Reg */
|
||||||
#define I2SCLH_HS_SCLH 0x00000020 /* Fast Plus I2C SCL Duty Cycle High Reg */
|
#define I2SCLH_HS_SCLH 0x00000020 /* Fast Plus I2C SCL Duty Cycle High Reg */
|
||||||
#define I2SCLL_HS_SCLL 0x00000020 /* Fast Plus I2C SCL Duty Cycle Low Reg */
|
#define I2SCLL_HS_SCLL 0x00000020 /* Fast Plus I2C SCL Duty Cycle Low Reg */
|
||||||
|
|
||||||
|
|
||||||
extern volatile uint8_t I2CMasterBuffer[I2C_BUFSIZE];
|
extern volatile uint8_t I2CMasterBuffer[I2C_BUFSIZE];
|
||||||
extern volatile uint8_t I2CSlaveBuffer[I2C_BUFSIZE];
|
extern volatile uint8_t I2CSlaveBuffer[I2C_BUFSIZE];
|
||||||
extern volatile uint32_t I2CReadLength, I2CWriteLength;
|
extern volatile uint32_t I2CReadLength, I2CWriteLength;
|
||||||
|
|
||||||
extern void I2C_IRQHandler( void );
|
extern void I2C_IRQHandler( void );
|
||||||
extern uint32_t i2cInit( uint32_t I2cMode );
|
extern uint32_t i2cInit( uint32_t I2cMode );
|
||||||
extern uint32_t i2cEngine( void );
|
extern uint32_t i2cEngine( void );
|
||||||
|
|
||||||
#endif /* end __I2C_H */
|
#endif /* end __I2C_H */
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
** End Of File
|
** End Of File
|
||||||
*****************************************************************************/
|
*****************************************************************************/
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue