2018-01-06 17:54:51 +00:00
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/*
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2018-05-08 11:02:20 +00:00
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* This file is part of the hoverboard-firmware-hack project.
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2018-01-06 17:54:51 +00:00
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*
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2018-05-08 11:02:20 +00:00
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* Copyright (C) 2017-2018 Rene Hopf <renehopf@mac.com>
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* Copyright (C) 2017-2018 Nico Stute <crinq@crinq.de>
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* Copyright (C) 2017-2018 Niklas Fauth <niklas.fauth@kit.fail>
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2018-01-06 17:54:51 +00:00
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2018-01-06 22:33:34 +00:00
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/*
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tim1 master, enable -> trgo
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tim8, gated slave mode, trgo by tim1 trgo. overflow -> trgo
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adc1,adc2 triggered by tim8 trgo
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adc 1,2 dual mode
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ADC1 ADC2
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R_Blau PC4 CH14 R_Gelb PC5 CH15
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L_Grün PA0 CH01 L_Blau PC3 CH13
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R_DC PC1 CH11 L_DC PC0 CH10
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BAT PC2 CH12 L_TX PA2 CH02
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BAT PC2 CH12 L_RX PA3 CH03
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pb10 usart3 dma1 channel2/3
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*/
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2017-12-30 01:55:59 +00:00
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#include "defines.h"
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2018-02-09 07:53:25 +00:00
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#include "config.h"
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2017-12-30 01:55:59 +00:00
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2018-01-06 21:59:15 +00:00
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TIM_HandleTypeDef htim_right;
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TIM_HandleTypeDef htim_left;
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ADC_HandleTypeDef hadc1;
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ADC_HandleTypeDef hadc2;
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2018-04-07 22:03:35 +00:00
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I2C_HandleTypeDef hi2c2;
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2018-01-06 21:59:15 +00:00
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volatile adc_buf_t adc_buffer;
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2018-04-07 22:03:35 +00:00
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#ifdef DEBUG_SERIAL_USART3
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2018-01-06 22:33:34 +00:00
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void UART_Init() {
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2018-01-06 21:59:15 +00:00
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__HAL_RCC_USART3_CLK_ENABLE();
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__HAL_RCC_DMA1_CLK_ENABLE();
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UART_HandleTypeDef huart3;
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2018-01-06 22:33:34 +00:00
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huart3.Instance = USART3;
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2018-02-09 07:53:25 +00:00
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huart3.Init.BaudRate = DEBUG_BAUD;
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2018-01-06 22:33:34 +00:00
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huart3.Init.WordLength = UART_WORDLENGTH_8B;
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huart3.Init.StopBits = UART_STOPBITS_1;
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huart3.Init.Parity = UART_PARITY_NONE;
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huart3.Init.Mode = UART_MODE_TX;
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huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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2018-01-06 21:59:15 +00:00
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huart3.Init.OverSampling = UART_OVERSAMPLING_16;
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HAL_UART_Init(&huart3);
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2018-01-06 22:33:34 +00:00
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USART3->CR3 |= USART_CR3_DMAT; // | USART_CR3_DMAR | USART_CR3_OVRDIS;
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2018-01-06 21:59:15 +00:00
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GPIO_InitTypeDef GPIO_InitStruct;
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2018-01-06 22:33:34 +00:00
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GPIO_InitStruct.Pin = GPIO_PIN_10;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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2018-01-06 21:59:15 +00:00
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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2018-01-06 22:33:34 +00:00
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DMA1_Channel2->CCR = 0;
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DMA1_Channel2->CPAR = (uint32_t) & (USART3->DR);
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2018-01-06 21:59:15 +00:00
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DMA1_Channel2->CNDTR = 0;
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2018-01-06 22:33:34 +00:00
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DMA1_Channel2->CCR = DMA_CCR_MINC | DMA_CCR_DIR;
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DMA1->IFCR = DMA_IFCR_CTCIF2 | DMA_IFCR_CHTIF2 | DMA_IFCR_CGIF2;
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2018-01-06 21:59:15 +00:00
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}
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2018-04-07 22:03:35 +00:00
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#endif
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#ifdef DEBUG_SERIAL_USART2
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void UART_Init() {
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__HAL_RCC_USART2_CLK_ENABLE();
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__HAL_RCC_DMA1_CLK_ENABLE();
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UART_HandleTypeDef huart2;
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huart2.Instance = USART2;
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huart2.Init.BaudRate = DEBUG_BAUD;
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huart2.Init.WordLength = UART_WORDLENGTH_8B;
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huart2.Init.StopBits = UART_STOPBITS_1;
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huart2.Init.Parity = UART_PARITY_NONE;
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huart2.Init.Mode = UART_MODE_TX;
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huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart2.Init.OverSampling = UART_OVERSAMPLING_16;
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HAL_UART_Init(&huart2);
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USART2->CR3 |= USART_CR3_DMAT; // | USART_CR3_DMAR | USART_CR3_OVRDIS;
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GPIO_InitTypeDef GPIO_InitStruct;
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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DMA1_Channel7->CCR = 0;
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DMA1_Channel7->CPAR = (uint32_t) & (USART2->DR);
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DMA1_Channel7->CNDTR = 0;
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DMA1_Channel7->CCR = DMA_CCR_MINC | DMA_CCR_DIR;
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DMA1->IFCR = DMA_IFCR_CTCIF7 | DMA_IFCR_CHTIF7 | DMA_IFCR_CGIF7;
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}
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#endif
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2018-01-06 21:59:15 +00:00
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2018-01-07 02:11:55 +00:00
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/*
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void UART_Init() {
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__HAL_RCC_USART2_CLK_ENABLE();
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__HAL_RCC_DMA1_CLK_ENABLE();
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UART_HandleTypeDef huart2;
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huart2.Instance = USART2;
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huart2.Init.BaudRate = 115200;
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huart2.Init.WordLength = UART_WORDLENGTH_8B;
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huart2.Init.StopBits = UART_STOPBITS_1;
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huart2.Init.Parity = UART_PARITY_NONE;
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huart2.Init.Mode = UART_MODE_TX;
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huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart2.Init.OverSampling = UART_OVERSAMPLING_16;
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HAL_UART_Init(&huart2);
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USART2->CR3 |= USART_CR3_DMAT; // | USART_CR3_DMAR | USART_CR3_OVRDIS;
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GPIO_InitTypeDef GPIO_InitStruct;
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GPIO_InitStruct.Pin = GPIO_PIN_2;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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DMA1_Channel7->CCR = 0;
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DMA1_Channel7->CPAR = (uint32_t) & (USART3->DR);
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DMA1_Channel7->CNDTR = 0;
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DMA1_Channel7->CCR = DMA_CCR_MINC | DMA_CCR_DIR;
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DMA1->IFCR = DMA_IFCR_CTCIF7 | DMA_IFCR_CHTIF7 | DMA_IFCR_CGIF7;
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}
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*/
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2018-01-06 21:59:15 +00:00
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2018-04-07 22:03:35 +00:00
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DMA_HandleTypeDef hdma_i2c2_rx;
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DMA_HandleTypeDef hdma_i2c2_tx;
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void I2C_Init()
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{
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__HAL_RCC_I2C2_CLK_ENABLE();
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__HAL_RCC_DMA1_CLK_ENABLE();
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/* DMA1_Channel4_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 1, 4);
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HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
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/* DMA1_Channel5_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 1, 3);
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HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
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hi2c2.Instance = I2C2;
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hi2c2.Init.ClockSpeed = 100000;
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hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
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hi2c2.Init.OwnAddress1 = 0;
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hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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hi2c2.Init.OwnAddress2 = 0;
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hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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HAL_I2C_Init(&hi2c2);
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GPIO_InitTypeDef GPIO_InitStruct;
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__HAL_RCC_DMA1_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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/* USER CODE BEGIN I2C2_MspInit 0 */
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/* USER CODE END I2C2_MspInit 0 */
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/**I2C2 GPIO Configuration
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PB10 ------> I2C2_SCL
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PB11 ------> I2C2_SDA
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* Peripheral clock enable */
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__HAL_RCC_I2C2_CLK_ENABLE();
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/* Peripheral DMA init*/
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hdma_i2c2_rx.Instance = DMA1_Channel5;
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hdma_i2c2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_i2c2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_i2c2_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_i2c2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_i2c2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_i2c2_rx.Init.Mode = DMA_NORMAL;
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hdma_i2c2_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
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HAL_DMA_Init(&hdma_i2c2_rx);
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__HAL_LINKDMA(&hi2c2,hdmarx,hdma_i2c2_rx);
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hdma_i2c2_tx.Instance = DMA1_Channel4;
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hdma_i2c2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_i2c2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_i2c2_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_i2c2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_i2c2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_i2c2_tx.Init.Mode = DMA_NORMAL;
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hdma_i2c2_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
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HAL_DMA_Init(&hdma_i2c2_tx);
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__HAL_LINKDMA(&hi2c2,hdmatx,hdma_i2c2_tx);
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/* Peripheral interrupt init */
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HAL_NVIC_SetPriority(I2C2_EV_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(I2C2_EV_IRQn);
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HAL_NVIC_SetPriority(I2C2_ER_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(I2C2_ER_IRQn);
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/* USER CODE BEGIN I2C2_MspInit 1 */
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/* USER CODE END I2C2_MspInit 1 */
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}
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2018-01-06 22:33:34 +00:00
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void MX_GPIO_Init(void) {
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2017-12-30 01:55:59 +00:00
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GPIO_InitTypeDef GPIO_InitStruct;
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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2018-01-06 22:33:34 +00:00
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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2017-12-30 01:55:59 +00:00
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GPIO_InitStruct.Pin = LEFT_HALL_U_PIN;
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HAL_GPIO_Init(LEFT_HALL_U_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LEFT_HALL_V_PIN;
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HAL_GPIO_Init(LEFT_HALL_V_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LEFT_HALL_W_PIN;
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HAL_GPIO_Init(LEFT_HALL_W_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_HALL_U_PIN;
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HAL_GPIO_Init(RIGHT_HALL_U_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_HALL_V_PIN;
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HAL_GPIO_Init(RIGHT_HALL_V_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_HALL_W_PIN;
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HAL_GPIO_Init(RIGHT_HALL_W_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = CHARGER_PIN;
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HAL_GPIO_Init(CHARGER_PORT, &GPIO_InitStruct);
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2018-02-10 00:37:36 +00:00
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GPIO_InitStruct.Pin = BUTTON_PIN;
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HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
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2017-12-30 01:55:59 +00:00
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pin = LED_PIN;
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HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = BUZZER_PIN;
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HAL_GPIO_Init(BUZZER_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = OFF_PIN;
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HAL_GPIO_Init(OFF_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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2018-01-06 22:33:34 +00:00
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2017-12-30 01:55:59 +00:00
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GPIO_InitStruct.Pin = LEFT_DC_CUR_PIN;
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HAL_GPIO_Init(LEFT_DC_CUR_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LEFT_U_CUR_PIN;
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HAL_GPIO_Init(LEFT_U_CUR_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LEFT_V_CUR_PIN;
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HAL_GPIO_Init(LEFT_V_CUR_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_DC_CUR_PIN;
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HAL_GPIO_Init(RIGHT_DC_CUR_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_U_CUR_PIN;
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HAL_GPIO_Init(RIGHT_U_CUR_PORT, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RIGHT_V_CUR_PIN;
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HAL_GPIO_Init(RIGHT_V_CUR_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = DCLINK_PIN;
|
|
|
|
HAL_GPIO_Init(DCLINK_PORT, &GPIO_InitStruct);
|
|
|
|
|
2018-02-18 12:37:50 +00:00
|
|
|
//Analog in
|
|
|
|
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
|
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
|
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
|
|
|
2017-12-30 01:55:59 +00:00
|
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
2018-01-06 22:33:34 +00:00
|
|
|
|
2017-12-30 01:55:59 +00:00
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_UH_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_UH_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_VH_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_VH_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_WH_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_WH_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_UL_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_UL_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_VL_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_VL_PORT, &GPIO_InitStruct);
|
|
|
|
|
|
|
|
GPIO_InitStruct.Pin = LEFT_TIM_WL_PIN;
|
|
|
|
HAL_GPIO_Init(LEFT_TIM_WL_PORT, &GPIO_InitStruct);
|
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_UH_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_UH_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_VH_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_VH_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_WH_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_WH_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_UL_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_UL_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_VL_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_VL_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
GPIO_InitStruct.Pin = RIGHT_TIM_WL_PIN;
|
|
|
|
HAL_GPIO_Init(RIGHT_TIM_WL_PORT, &GPIO_InitStruct);
|
2017-12-30 01:55:59 +00:00
|
|
|
}
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
void MX_TIM_Init(void) {
|
2017-12-30 01:55:59 +00:00
|
|
|
__HAL_RCC_TIM1_CLK_ENABLE();
|
|
|
|
__HAL_RCC_TIM8_CLK_ENABLE();
|
2018-01-06 22:33:34 +00:00
|
|
|
|
2017-12-30 01:55:59 +00:00
|
|
|
TIM_MasterConfigTypeDef sMasterConfig;
|
|
|
|
TIM_OC_InitTypeDef sConfigOC;
|
|
|
|
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
|
|
|
|
TIM_SlaveConfigTypeDef sTimConfig;
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
htim_right.Instance = RIGHT_TIM;
|
|
|
|
htim_right.Init.Prescaler = 0;
|
|
|
|
htim_right.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1;
|
|
|
|
htim_right.Init.Period = 64000000 / 2 / PWM_FREQ;
|
|
|
|
htim_right.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
2017-12-30 01:55:59 +00:00
|
|
|
htim_right.Init.RepetitionCounter = 0;
|
|
|
|
htim_right.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIM_PWM_Init(&htim_right);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;
|
2018-01-06 22:33:34 +00:00
|
|
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIMEx_MasterConfigSynchronization(&htim_right, &sMasterConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
|
|
|
sConfigOC.Pulse = 0;
|
|
|
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
|
|
|
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_LOW;
|
|
|
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
|
|
|
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
2017-12-30 01:55:59 +00:00
|
|
|
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_SET;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_right, &sConfigOC, TIM_CHANNEL_1);
|
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_right, &sConfigOC, TIM_CHANNEL_2);
|
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_right, &sConfigOC, TIM_CHANNEL_3);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE;
|
2017-12-30 01:55:59 +00:00
|
|
|
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE;
|
2018-01-06 22:33:34 +00:00
|
|
|
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
|
|
|
sBreakDeadTimeConfig.DeadTime = DEAD_TIME;
|
|
|
|
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
|
|
|
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW;
|
|
|
|
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIMEx_ConfigBreakDeadTime(&htim_right, &sBreakDeadTimeConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
htim_left.Instance = LEFT_TIM;
|
|
|
|
htim_left.Init.Prescaler = 0;
|
|
|
|
htim_left.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1;
|
|
|
|
htim_left.Init.Period = 64000000 / 2 / PWM_FREQ;
|
|
|
|
htim_left.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
2017-12-30 01:55:59 +00:00
|
|
|
htim_left.Init.RepetitionCounter = 0;
|
|
|
|
htim_left.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIM_PWM_Init(&htim_left);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
|
2018-01-06 22:33:34 +00:00
|
|
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIMEx_MasterConfigSynchronization(&htim_left, &sMasterConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
sTimConfig.InputTrigger = TIM_TS_ITR0;
|
2018-01-06 22:33:34 +00:00
|
|
|
sTimConfig.SlaveMode = TIM_SLAVEMODE_GATED;
|
2017-12-30 01:55:59 +00:00
|
|
|
HAL_TIM_SlaveConfigSynchronization(&htim_left, &sTimConfig);
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
|
|
|
sConfigOC.Pulse = 0;
|
|
|
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
|
|
|
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_LOW;
|
|
|
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
|
|
|
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
2017-12-30 01:55:59 +00:00
|
|
|
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_SET;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_left, &sConfigOC, TIM_CHANNEL_1);
|
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_left, &sConfigOC, TIM_CHANNEL_2);
|
|
|
|
HAL_TIM_PWM_ConfigChannel(&htim_left, &sConfigOC, TIM_CHANNEL_3);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE;
|
2017-12-30 01:55:59 +00:00
|
|
|
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE;
|
2018-01-06 22:33:34 +00:00
|
|
|
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
|
|
|
sBreakDeadTimeConfig.DeadTime = DEAD_TIME;
|
|
|
|
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
|
|
|
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW;
|
|
|
|
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_TIMEx_ConfigBreakDeadTime(&htim_left, &sBreakDeadTimeConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
LEFT_TIM->BDTR &= ~TIM_BDTR_MOE;
|
|
|
|
RIGHT_TIM->BDTR &= ~TIM_BDTR_MOE;
|
|
|
|
|
2017-12-30 01:55:59 +00:00
|
|
|
HAL_TIM_PWM_Start(&htim_left, TIM_CHANNEL_1);
|
|
|
|
HAL_TIM_PWM_Start(&htim_left, TIM_CHANNEL_2);
|
|
|
|
HAL_TIM_PWM_Start(&htim_left, TIM_CHANNEL_3);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_left, TIM_CHANNEL_1);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_left, TIM_CHANNEL_2);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_left, TIM_CHANNEL_3);
|
|
|
|
|
2018-01-06 17:54:51 +00:00
|
|
|
HAL_TIM_PWM_Start(&htim_right, TIM_CHANNEL_1);
|
|
|
|
HAL_TIM_PWM_Start(&htim_right, TIM_CHANNEL_2);
|
|
|
|
HAL_TIM_PWM_Start(&htim_right, TIM_CHANNEL_3);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_right, TIM_CHANNEL_1);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_right, TIM_CHANNEL_2);
|
|
|
|
HAL_TIMEx_PWMN_Start(&htim_right, TIM_CHANNEL_3);
|
|
|
|
|
|
|
|
htim_left.Instance->RCR = 1;
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
__HAL_TIM_ENABLE(&htim_right);
|
|
|
|
}
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
void MX_ADC1_Init(void) {
|
2017-12-30 01:55:59 +00:00
|
|
|
ADC_MultiModeTypeDef multimode;
|
|
|
|
ADC_ChannelConfTypeDef sConfig;
|
|
|
|
|
|
|
|
__HAL_RCC_ADC1_CLK_ENABLE();
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
hadc1.Instance = ADC1;
|
|
|
|
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
|
|
|
|
hadc1.Init.ContinuousConvMode = DISABLE;
|
2017-12-30 01:55:59 +00:00
|
|
|
hadc1.Init.DiscontinuousConvMode = DISABLE;
|
2018-01-06 22:33:34 +00:00
|
|
|
hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO;
|
|
|
|
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
|
|
|
hadc1.Init.NbrOfConversion = 5;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_Init(&hadc1);
|
2018-01-06 22:33:34 +00:00
|
|
|
/**Enable or disable the remapping of ADC1_ETRGREG:
|
2018-02-09 07:53:25 +00:00
|
|
|
* ADC1 External Event regular conversion is connected to TIM8 TRG0
|
2017-12-30 01:55:59 +00:00
|
|
|
*/
|
|
|
|
__HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE();
|
|
|
|
|
2018-02-09 07:53:25 +00:00
|
|
|
/**Configure the ADC multi-mode
|
2017-12-30 01:55:59 +00:00
|
|
|
*/
|
2018-01-06 17:54:51 +00:00
|
|
|
multimode.Mode = ADC_DUALMODE_REGSIMULT;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
sConfig.SamplingTime = ADC_SAMPLETIME_7CYCLES_5;
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 21:59:15 +00:00
|
|
|
sConfig.Channel = ADC_CHANNEL_14;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 1;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc1, &sConfig);
|
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
sConfig.Channel = ADC_CHANNEL_0;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 2;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc1, &sConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
sConfig.SamplingTime = ADC_SAMPLETIME_13CYCLES_5;
|
|
|
|
|
2018-01-06 21:59:15 +00:00
|
|
|
sConfig.Channel = ADC_CHANNEL_11;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 3;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc1, &sConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-06 21:59:15 +00:00
|
|
|
sConfig.Channel = ADC_CHANNEL_12;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 4;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc1, &sConfig);
|
|
|
|
|
|
|
|
sConfig.Channel = ADC_CHANNEL_12;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 5;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc1, &sConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
hadc1.Instance->CR2 |= ADC_CR2_DMA;
|
|
|
|
|
|
|
|
__HAL_ADC_ENABLE(&hadc1);
|
|
|
|
|
|
|
|
__HAL_RCC_DMA1_CLK_ENABLE();
|
|
|
|
|
2018-01-06 22:33:34 +00:00
|
|
|
DMA1_Channel1->CCR = 0;
|
2018-01-06 21:59:15 +00:00
|
|
|
DMA1_Channel1->CNDTR = 5;
|
2018-01-06 22:33:34 +00:00
|
|
|
DMA1_Channel1->CPAR = (uint32_t) & (ADC1->DR);
|
|
|
|
DMA1_Channel1->CMAR = (uint32_t)&adc_buffer;
|
|
|
|
DMA1_Channel1->CCR = DMA_CCR_MSIZE_1 | DMA_CCR_PSIZE_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TCIE;
|
2017-12-30 01:55:59 +00:00
|
|
|
DMA1_Channel1->CCR |= DMA_CCR_EN;
|
|
|
|
|
|
|
|
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
|
|
|
|
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ADC2 init function */
|
2018-01-06 22:33:34 +00:00
|
|
|
void MX_ADC2_Init(void) {
|
2017-12-30 01:55:59 +00:00
|
|
|
ADC_ChannelConfTypeDef sConfig;
|
|
|
|
|
|
|
|
__HAL_RCC_ADC2_CLK_ENABLE();
|
|
|
|
|
|
|
|
// HAL_ADC_DeInit(&hadc2);
|
|
|
|
// hadc2.Instance->CR2 = 0;
|
2018-02-09 07:53:25 +00:00
|
|
|
/**Common config
|
2017-12-30 01:55:59 +00:00
|
|
|
*/
|
2018-01-06 22:33:34 +00:00
|
|
|
hadc2.Instance = ADC2;
|
|
|
|
hadc2.Init.ScanConvMode = ADC_SCAN_ENABLE;
|
|
|
|
hadc2.Init.ContinuousConvMode = DISABLE;
|
2017-12-30 01:55:59 +00:00
|
|
|
hadc2.Init.DiscontinuousConvMode = DISABLE;
|
2018-01-06 22:33:34 +00:00
|
|
|
hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
|
|
|
hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
|
|
|
hadc2.Init.NbrOfConversion = 5;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_Init(&hadc2);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
sConfig.SamplingTime = ADC_SAMPLETIME_7CYCLES_5;
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
sConfig.Channel = ADC_CHANNEL_15;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 1;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc2, &sConfig);
|
|
|
|
|
|
|
|
sConfig.Channel = ADC_CHANNEL_13;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 2;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc2, &sConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
2018-01-07 02:11:55 +00:00
|
|
|
sConfig.SamplingTime = ADC_SAMPLETIME_13CYCLES_5;
|
|
|
|
|
2018-01-06 21:59:15 +00:00
|
|
|
sConfig.Channel = ADC_CHANNEL_10;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 3;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc2, &sConfig);
|
|
|
|
|
|
|
|
sConfig.Channel = ADC_CHANNEL_2;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 4;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc2, &sConfig);
|
|
|
|
|
|
|
|
sConfig.Channel = ADC_CHANNEL_3;
|
2018-01-06 22:33:34 +00:00
|
|
|
sConfig.Rank = 5;
|
2018-01-06 21:59:15 +00:00
|
|
|
HAL_ADC_ConfigChannel(&hadc2, &sConfig);
|
2017-12-30 01:55:59 +00:00
|
|
|
|
|
|
|
hadc2.Instance->CR2 |= ADC_CR2_DMA;
|
|
|
|
__HAL_ADC_ENABLE(&hadc2);
|
|
|
|
}
|