150 lines
4.9 KiB
C
150 lines
4.9 KiB
C
|
/* ----------------------------------------------------------------------
|
||
|
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
|
||
|
*
|
||
|
* $Date: 19. March 2015
|
||
|
* $Revision: V.1.4.5
|
||
|
*
|
||
|
* Project: CMSIS DSP Library
|
||
|
* Title: arm_scale_q7.c
|
||
|
*
|
||
|
* Description: Multiplies a Q7 vector by a scalar.
|
||
|
*
|
||
|
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||
|
*
|
||
|
* Redistribution and use in source and binary forms, with or without
|
||
|
* modification, are permitted provided that the following conditions
|
||
|
* are met:
|
||
|
* - Redistributions of source code must retain the above copyright
|
||
|
* notice, this list of conditions and the following disclaimer.
|
||
|
* - Redistributions in binary form must reproduce the above copyright
|
||
|
* notice, this list of conditions and the following disclaimer in
|
||
|
* the documentation and/or other materials provided with the
|
||
|
* distribution.
|
||
|
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||
|
* may be used to endorse or promote products derived from this
|
||
|
* software without specific prior written permission.
|
||
|
*
|
||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||
|
* -------------------------------------------------------------------- */
|
||
|
|
||
|
#include "arm_math.h"
|
||
|
|
||
|
/**
|
||
|
* @ingroup groupMath
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @addtogroup scale
|
||
|
* @{
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @brief Multiplies a Q7 vector by a scalar.
|
||
|
* @param[in] *pSrc points to the input vector
|
||
|
* @param[in] scaleFract fractional portion of the scale value
|
||
|
* @param[in] shift number of bits to shift the result by
|
||
|
* @param[out] *pDst points to the output vector
|
||
|
* @param[in] blockSize number of samples in the vector
|
||
|
* @return none.
|
||
|
*
|
||
|
* <b>Scaling and Overflow Behavior:</b>
|
||
|
* \par
|
||
|
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
|
||
|
* These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
|
||
|
*/
|
||
|
|
||
|
void arm_scale_q7(
|
||
|
q7_t * pSrc,
|
||
|
q7_t scaleFract,
|
||
|
int8_t shift,
|
||
|
q7_t * pDst,
|
||
|
uint32_t blockSize)
|
||
|
{
|
||
|
int8_t kShift = 7 - shift; /* shift to apply after scaling */
|
||
|
uint32_t blkCnt; /* loop counter */
|
||
|
|
||
|
#ifndef ARM_MATH_CM0_FAMILY
|
||
|
|
||
|
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||
|
q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
|
||
|
|
||
|
|
||
|
/*loop Unrolling */
|
||
|
blkCnt = blockSize >> 2u;
|
||
|
|
||
|
|
||
|
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||
|
** a second loop below computes the remaining 1 to 3 samples. */
|
||
|
while(blkCnt > 0u)
|
||
|
{
|
||
|
/* Reading 4 inputs from memory */
|
||
|
in1 = *pSrc++;
|
||
|
in2 = *pSrc++;
|
||
|
in3 = *pSrc++;
|
||
|
in4 = *pSrc++;
|
||
|
|
||
|
/* C = A * scale */
|
||
|
/* Scale the inputs and then store the results in the temporary variables. */
|
||
|
out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
|
||
|
out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
|
||
|
out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
|
||
|
out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
|
||
|
|
||
|
/* Packing the individual outputs into 32bit and storing in
|
||
|
* destination buffer in single write */
|
||
|
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
|
||
|
|
||
|
/* Decrement the loop counter */
|
||
|
blkCnt--;
|
||
|
}
|
||
|
|
||
|
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||
|
** No loop unrolling is used. */
|
||
|
blkCnt = blockSize % 0x4u;
|
||
|
|
||
|
while(blkCnt > 0u)
|
||
|
{
|
||
|
/* C = A * scale */
|
||
|
/* Scale the input and then store the result in the destination buffer. */
|
||
|
*pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
|
||
|
|
||
|
/* Decrement the loop counter */
|
||
|
blkCnt--;
|
||
|
}
|
||
|
|
||
|
#else
|
||
|
|
||
|
/* Run the below code for Cortex-M0 */
|
||
|
|
||
|
/* Initialize blkCnt with number of samples */
|
||
|
blkCnt = blockSize;
|
||
|
|
||
|
while(blkCnt > 0u)
|
||
|
{
|
||
|
/* C = A * scale */
|
||
|
/* Scale the input and then store the result in the destination buffer. */
|
||
|
*pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
|
||
|
|
||
|
/* Decrement the loop counter */
|
||
|
blkCnt--;
|
||
|
}
|
||
|
|
||
|
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||
|
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @} end of scale group
|
||
|
*/
|