ctdo
/
crashtest-r0ket
16
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge branch 'master' of github.com:r0ket/r0ket

This commit is contained in:
schneider 2011-07-14 02:18:39 +02:00
parent 3ba6d6ef2f 5ee854f6ac
commit d89b1be37f
6 changed files with 187 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

59
firmware/applications/exe.c
View File

@ -1,4 +1,5 @@
#include <sysinit.h>
#include <string.h>
#include "basic/basic.h"
@ -54,21 +55,56 @@ void execute_file (const char * fname){
/**************************************************************************/
void execute_menu(void){
FATFS FatFs; /* File system object for logical drive */
FRESULT res;
lcdPrintln("Enter RAM!");
lcdRefresh();
while(getInput()!=BTN_NONE);
res=f_mount(0, &FatFs);
lcdPrint("Mount:");
lcdPrintln(f_get_rc_string(res));
execute_file("0:test.c0d");
lcdRefresh();
};
#define MAXENTRIES 10
#define FLEN 13
void select_menu(void){
DIR dir; /* Directory object */
FILINFO Finfo;
FRESULT res;
char fname[FLEN*MAXENTRIES];
int ctr;
res = f_opendir(&dir, "0:");
lcdPrint("OpenDir:");
lcdPrintln(f_get_rc_string(res));
if(res){
return;
};
for(ctr=0;;ctr++) {
res = f_readdir(&dir, &Finfo);
if ((res != FR_OK) || !Finfo.fname[0]) break;
int len=strlen(Finfo.fname);
if( Finfo.fname[len-4]!='.' ||
Finfo.fname[len-3]!='C' ||
Finfo.fname[len-2]!='0' ||
Finfo.fname[len-1]!='D')
continue;
if (Finfo.fattrib & AM_DIR)
continue;
lcdPrint(" ");
lcdPrint(Finfo.fname);
lcdPrint(" <");
lcdPrintInt(Finfo.fsize);
lcdPrint(">");
lcdNl();
strcpy(fname+ctr*FLEN,Finfo.fname);
}
lcdPrintln("<done>");
};
void msc_menu(void){
DoString(0,8,"MSC Enabled.");
lcdDisplay(0);
@ -109,10 +145,12 @@ const struct MENU_DEF menu_volt = {"Akku", &adc_check};
const struct MENU_DEF menu_nop = {"---", NULL};
const struct MENU_DEF menu_msc = {"MSC", &msc_menu};
const struct MENU_DEF menu_exe = {"Exec", &execute_menu};
const struct MENU_DEF menu_exesel = {"Exec2", &select_menu};
static menuentry menu[] = {
&menu_msc,
&menu_exe,
&menu_exesel,
&menu_nop,
&menu_mirror,
&menu_volt,
@ -129,6 +167,15 @@ void main_exe(void) {
backlightInit();
font=&Font_7x8;
FATFS FatFs; /* File system object for logical drive */
FRESULT res;
res=f_mount(0, &FatFs);
if(res!=FR_OK){
lcdPrint("Mount:");
lcdPrintln(f_get_rc_string(res));
getInput();
};
while (1) {
lcdFill(0); // clear display buffer
lcdDisplay(0);

22
firmware/applications/funk.c
View File

@ -15,10 +15,6 @@ void f_init(void){
dx=DoString(0,dy,"Done."); ;dy+=8;
};
#define CS_LOW() {gpioSetValue(RB_SPI_NRF_CS, 0); gpioSetValue(3,2,0);}
#define CS_HIGH() {gpioSetValue(RB_SPI_NRF_CS, 1); gpioSetValue(3,2,1);}
#include "core/ssp/ssp.h"
void f_status(void){
int dx=0;
int dy=8;
@ -28,12 +24,22 @@ void f_status(void){
buf[1]=0;
buf[2]=0;
buf[3]=0;
dx=DoString(0,dy,"S:"); DoIntX(dx,dy,*(int*)buf);dy+=8;
dx=DoString(0,dy,"S:");
dx=DoCharX(dx,dy,buf[0]);
dx=DoCharX(dx,dy,buf[1]);
dx=DoCharX(dx,dy,buf[2]);
dx=DoCharX(dx,dy,buf[3]);
dy+=8;
nrf_cmd_rw_long(buf,2);
dx=DoString(0,dy,"R:"); DoIntX(dx,dy,*(int*)buf);dy+=8;
dx=DoString(0,dy,"R:");
dx=DoCharX(dx,dy,buf[0]);
dx=DoCharX(dx,dy,buf[1]);
dx=DoCharX(dx,dy,buf[2]);
dx=DoCharX(dx,dy,buf[3]);
dy+=8;
int status=nrf_cmd_status(C_NOP);
dx=DoString(0,dy,"St:"); DoIntX(dx,dy,status);dy+=8;
dx=DoString(0,dy,"St:"); DoCharX(dx,dy,status);dy+=8;
};
void f_recv(void){
@ -55,7 +61,7 @@ void f_recv(void){
return;
};
dx=DoString(0,dy,"Size:"); DoInt(dx,dy,len); dy+=8;
dx=DoString(0,dy,"1:"); DoIntX(dx,dy,*(int*)(buf));dy+=8;
dx=DoString(0,dy,"1:"); DoIntX(dx,dy,*(int*)(buf+0));dy+=8;
dx=DoString(0,dy,"2:"); DoIntX(dx,dy,*(int*)(buf+4));dy+=8;
dx=DoString(0,dy,"3:"); DoIntX(dx,dy,*(int*)(buf+8));dy+=8;
dx=DoString(0,dy,"4:"); DoIntX(dx,dy,*(int*)(buf+12));dy+=8;

146
firmware/funk/nrf24l01p.c
View File

@ -13,6 +13,10 @@ inline void xmit_spi(uint8_t dat) {
sspSend(0, (uint8_t*) &dat, 1);
}
inline void rcv_spi(uint8_t *dat) {
sspReceive(0, dat, 1);
}
#define CS_LOW() gpioSetValue(RB_SPI_NRF_CS, 0)
#define CS_HIGH() gpioSetValue(RB_SPI_NRF_CS, 1)
#define CE_LOW() gpioSetValue(RB_NRF_CE, 0)
@ -45,6 +49,15 @@ void nrf_write_reg(const uint8_t reg, const uint8_t val){
CS_HIGH();
};
uint8_t nrf_read_reg(const uint8_t reg){
uint8_t val;
CS_LOW();
xmit_spi(C_R_REGISTER | reg);
rcv_spi(&val);
CS_HIGH();
return val;
};
void nrf_read_long(const uint8_t cmd, int len, uint8_t* data){
CS_LOW();
xmit_spi(cmd);
@ -62,51 +75,9 @@ void nrf_write_long(const uint8_t cmd, int len, uint8_t* data){
};
#define nrf_write_reg_long(reg, len, data) \
nrf_write_long(C_W_REGISTER|reg, len, data)
nrf_write_long(C_W_REGISTER|(reg), len, data)
void nrf_init() {
// Enable SPI correctly
sspInit(0, sspClockPolarity_Low, sspClockPhase_RisingEdge);
// Enable CS & CE pins
gpioSetDir(RB_SPI_NRF_CS, gpioDirection_Output);
gpioSetPullup(&RB_SPI_NRF_CS_IO, gpioPullupMode_Inactive);
gpioSetDir(RB_NRF_CE, gpioDirection_Output);
gpioSetPullup(&RB_NRF_CE_IO, gpioPullupMode_PullUp);
// Setup for nrf24l01+
// power up takes 1.5ms - 3.5ms (depending on crystal)
CS_LOW();
nrf_write_reg(R_CONFIG,
R_CONFIG_PRIM_RX| // Receive mode
R_CONFIG_PWR_UP| // Power on
R_CONFIG_EN_CRC // CRC on, single byte
);
nrf_write_reg(R_EN_AA, 0); // Disable Enhanced ShockBurst;
nrf_write_reg(R_RF_CH, CHANNEL_BEACON &127); // Select channel
// enable receive pipes
nrf_write_reg(R_EN_RXADDR,R_EN_RXADDR_ERX_P0
// |R_EN_RXADDR_ERX_P1
);
nrf_write_reg(R_RX_PW_P0,16);
nrf_write_reg_long(R_RX_ADDR_P0,5,(uint8_t*)MAC_BEACON);
// nrf_write_reg(R_RX_PW_P1,16);
// nrf_write_reg_long(R_RX_ADDR_P1,5,"R0KET");
// OpenBeacon transmit address
nrf_write_reg_long(R_TX_ADDR,5,(uint8_t*)MAC_BEACON);
// Set speed / strength
nrf_write_reg(R_RF_SETUP,DEFAULT_SPEED|R_RF_SETUP_RF_PWR_3);
// XXX: or write R_CONFIG last?
CE_LOW();
};
// High-Level:
int nrf_rcv_pkt_time(int maxtime, int maxsize, uint8_t * pkt){
uint8_t buf;
@ -159,7 +130,6 @@ int nrf_rcv_pkt_time(int maxtime, int maxsize, uint8_t * pkt){
};
char nrf_snd_pkt_crc(int size, uint8_t * pkt){
char status;
if(size > MAX_PKT)
size=MAX_PKT;
@ -185,3 +155,89 @@ char nrf_snd_pkt_crc(int size, uint8_t * pkt){
return nrf_cmd_status(C_NOP);
};
void nrf_set_rx_mac(int pipe, int rxlen, int maclen, uint8_t * mac){
#ifdef SAFE
assert(maclen>=1 || maclen<=5);
assert(rxlen>=1 || rxlen<=32);
assert(pipe>=0 || pipe<=5);
assert(mac!=NULL);
if(pipe>1)
assert(maclen==1);
#endif
nrf_write_reg(R_RX_PW_P0+pipe,rxlen);
nrf_write_reg_long(R_RX_ADDR_P0+pipe,maclen,mac);
nrf_write_reg(R_EN_RXADDR,
nrf_read_reg(R_EN_RXADDR) | (1<<pipe)
);
};
void nrf_set_tx_mac(int maclen, uint8_t * mac){
#ifdef SAFE
assert(maclen>=1 || maclen<=5);
assert(mac!=NULL);
#endif
nrf_write_reg_long(R_TX_ADDR,maclen,mac);
};
void nrf_disable_pipe(int pipe){
#ifdef SAFE
assert(pipe>=0 || pipe<=5);
#endif
nrf_write_reg(R_EN_RXADDR,
nrf_read_reg(R_EN_RXADDR) & ~(1<<pipe)
);
};
void nrf_set_channel(int channel){
#ifdef SAFE
assert(channel &~R_RF_CH_BITS ==0);
#endif
nrf_write_reg(R_RF_CH, channel);
};
void nrf_init() {
// Enable SPI correctly
sspInit(0, sspClockPolarity_Low, sspClockPhase_RisingEdge);
// Enable CS & CE pins
gpioSetDir(RB_SPI_NRF_CS, gpioDirection_Output);
gpioSetPullup(&RB_SPI_NRF_CS_IO, gpioPullupMode_Inactive);
gpioSetDir(RB_NRF_CE, gpioDirection_Output);
gpioSetPullup(&RB_NRF_CE_IO, gpioPullupMode_PullUp);
CE_LOW();
// Setup for nrf24l01+
// power up takes 1.5ms - 3.5ms (depending on crystal)
CS_LOW();
nrf_write_reg(R_CONFIG,
R_CONFIG_PRIM_RX| // Receive mode
R_CONFIG_PWR_UP| // Power on
R_CONFIG_EN_CRC // CRC on, single byte
);
nrf_write_reg(R_EN_AA, 0); // Disable Enhanced ShockBurst;
nrf_set_channel(CHANNEL_BEACON);
// enable receive pipes
nrf_write_reg(R_EN_RXADDR,R_EN_RXADDR_ERX_P0
// |R_EN_RXADDR_ERX_P1
);
nrf_write_reg(R_RX_PW_P0,16);
nrf_write_reg_long(R_RX_ADDR_P0,5,(uint8_t*)MAC_BEACON);
// nrf_write_reg(R_RX_PW_P1,16);
// nrf_write_reg_long(R_RX_ADDR_P1,5,"R0KET");
// OpenBeacon transmit address
nrf_write_reg_long(R_TX_ADDR,5,(uint8_t*)MAC_BEACON);
// Set speed / strength
nrf_write_reg(R_RF_SETUP,DEFAULT_SPEED|R_RF_SETUP_RF_PWR_3);
// XXX: or write R_CONFIG last?
};

9
firmware/funk/nrf24l01p.h
View File

@ -80,6 +80,9 @@
#define R_EN_RXADDR_ERX_P0 0x01
#define R_EN_RXADDR_ERX_NONE 0x00
// RF_CH register definitions
#define R_RF_CH_BITS 0x7f
//RF_SETUP register definitions
#define R_RF_CONT_WAVE 0x80
#define R_RF_SETUP_RF_DR_LOW 0x20
@ -114,8 +117,14 @@ uint8_t nrf_cmd_status(uint8_t cmd);
void nrf_cmd_rw_long(uint8_t* data, int len);
void nrf_read_long(const uint8_t reg, int len, uint8_t* data);
void nrf_write_reg(const uint8_t reg, const uint8_t val);
uint8_t nrf_read_reg(const uint8_t reg);
void nrf_write_reg_long(const uint8_t reg, int len, uint8_t* data);
void nrf_set_rx_mac(int pipe, int rxlen, int maclen, uint8_t * mac);
void nrf_set_tx_mac(int maclen, uint8_t * mac);
void nrf_disable_pipe(int pipe);
void nrf_set_channel(int channel);
/* END */
#endif /* _NRF24L01P_H */

16
firmware/lcd/render.c
View File

@ -196,8 +196,7 @@ int DoInt(int sx, int sy, int num){
#undef mxlen
};
int DoIntX(int sx, int sy, unsigned int num){
#define mxlen 8
int DoIntXn(int sx, int sy, unsigned int num, unsigned int mxlen){
char s[(mxlen+1)];
char * o=s;
int len;
@ -206,14 +205,15 @@ int DoIntX(int sx, int sy, unsigned int num){
s[len]=(num%16)+'0';
if(s[len]>'9')
s[len]+='A'-'9'-1;
if(num==0){
// s[len]=' '; // configurable?
// o=s+len; break;
};
num/=16;
};
return DoString(sx,sy,o);
#undef mxlen
};
int DoIntX(int sx, int sy, unsigned int num){
return DoIntXn(sx, sy, num, 8);
};
int DoCharX(int sx, int sy, unsigned char num){
return DoIntXn(sx, sy, num, 2);
};

2
firmware/lcd/render.h
View File

@ -29,6 +29,8 @@
int DoChar(int sx, int sy, int c);
int DoString(int sx, int sy, const char *s);
int DoInt(int sx, int sy, int num);
int DoIntXn(int sx, int sy, unsigned int num, unsigned int maxlen);
int DoIntX(int sx, int sy, unsigned int num);
int DoCharX(int sx, int sy, unsigned char num);
#endif