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crashtest-r0ket
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made rf test work

This commit is contained in:
schneider 2011-07-06 02:54:15 +02:00
parent 50ac82f893
commit 1d6f1a3adc
3 changed files with 51 additions and 7 deletions
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17
firmware/applications/funk.c
View File

@ -14,8 +14,8 @@ void f_init(void){
nrf_init();
};
#define CS_LOW() gpioSetValue(RB_SPI_NRF_CS, 0)
#define CS_HIGH() gpioSetValue(RB_SPI_NRF_CS, 1)
#define CS_LOW() {gpioSetValue(RB_SPI_NRF_CS, 0); gpioSetValue(3,2,0);}
#define CS_HIGH() {gpioSetValue(RB_SPI_NRF_CS, 1); gpioSetValue(3,2,1);}
#include "core/ssp/ssp.h"
void f_status(void){
@ -29,6 +29,9 @@ void f_status(void){
// Enable CS & CE pins
gpioSetDir(RB_SPI_NRF_CS, gpioDirection_Output);
gpioSetPullup(&RB_SPI_NRF_CS_IO, gpioPullupMode_Inactive);
gpioSetDir(3,2, gpioDirection_Output);
gpioSetPullup(&IOCON_PIO3_2, gpioPullupMode_Inactive);
CS_HIGH();
gpioSetDir(RB_NRF_CE, gpioDirection_Output);
gpioSetPullup(&RB_NRF_CE_IO, gpioPullupMode_Inactive);
@ -47,8 +50,8 @@ delayms(10);
CS_LOW();
delayms(10);
sspSend(0, buf, 2);
sspReceive(0, buf, 2);
sspSendReceive(0, buf, 2);
//sspReceive(0, buf, 2);
CS_HIGH();
delayms(10);
@ -70,8 +73,8 @@ delayms(10);
CS_LOW();
delayms(10);
sspSend(0, buf, 2);
sspReceive(0, buf, 2);
sspSendReceive(0, buf, 2);
//sspReceive(0, buf, 2);
CS_HIGH();
delayms(10);
@ -154,6 +157,8 @@ void handleMenu(const struct MENU *the_menu) {
visible_lines--; // subtract title line
while (!back) {
delayms(100);
uint8_t line = 0;
lcdFill(0); // clear display buffer

39
firmware/core/ssp/ssp.c
View File

@ -297,3 +297,42 @@ void sspReceive(uint8_t portNum, uint8_t *buf, uint32_t length)
return;
}
/**************************************************************************/
/*!
@brief Sends a block of data to the SSP0 port and receives the
answer back into the same buffer.
@param[in] portNum
The SPI port to use (0..1)
@param[in] buf
Pointer to the data buffer
@param[in] length
Block length of the data buffer
*/
/**************************************************************************/
void sspSendReceive(uint8_t portNum, uint8_t *buf, uint32_t length)
{
uint32_t i;
uint8_t Dummy = Dummy;
if (portNum == 0)
{
for (i = 0; i < length; i++)
{
/* Move on only if NOT busy and TX FIFO not full. */
while ((SSP_SSP0SR & (SSP_SSP0SR_TNF_NOTFULL | SSP_SSP0SR_BSY_BUSY)) != SSP_SSP0SR_TNF_NOTFULL);
SSP_SSP0DR = *buf;
while ( (SSP_SSP0SR & (SSP_SSP0SR_BSY_BUSY|SSP_SSP0SR_RNE_NOTEMPTY)) != SSP_SSP0SR_RNE_NOTEMPTY );
/* Whenever a byte is written, MISO FIFO counter increments, Clear FIFO
on MISO. Otherwise, when SSP0Receive() is called, previous data byte
is left in the FIFO. */
*buf = SSP_SSP0DR;
buf++;
}
}
return;
}

2
firmware/core/ssp/ssp.h
View File

@ -81,5 +81,5 @@ extern void SSP_IRQHandler (void);
void sspInit (uint8_t portNum, sspClockPolarity_t polarity, sspClockPhase_t phase);
void sspSend (uint8_t portNum, uint8_t *buf, uint32_t length);
void sspReceive (uint8_t portNum, uint8_t *buf, uint32_t length);
void sspSendReceive(uint8_t portNum, uint8_t *buf, uint32_t length);
#endif