345 lines
11 KiB
C
345 lines
11 KiB
C
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/**************************************************************************/
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/*!
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@file timer32.c
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@author K. Townsend (microBuilder.eu)
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@date 22 March 2010
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@version 0.10
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@section DESCRIPTION
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Generic code for 32-bit timers. By default, the timers are configured
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to generate an interrupt once every 100 microseconds, incrementing a
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global variable once per tick.
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@warning Please note that the ROM-based USB drivers on the LPC1343
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require the use of 32-bit Timer 1. If you plan on using the
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ROM-based USB functionality, you should restrict your timer
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usage to 32-bit timer 0.
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@section Example
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@code
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#include "/core/cpu/cpu.h"
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#include "/core/timer32/timer32.h"
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...
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cpuInit();
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// Initialise 32-bit timer 0 with 100uS ticks
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timer32Init(0, TIMER32_DEFAULTINTERVAL);
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// Enable timer 0
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timer32Enable(0);
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// Cause a blocking delay for 1 second (1000mS)
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timer32Delay(0, TIMER32_DELAY_1MS * 1000);
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@endcode
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2010, microBuilder SARL
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**************************************************************************/
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#include "timer32.h"
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volatile uint32_t timer32_0_counter = 0;
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volatile uint32_t timer32_1_counter = 0;
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/**************************************************************************/
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/*!
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@brief Causes a blocking delay for the specified number of
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timer ticks. The duration of each 'tick' is determined by
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the 'timerInterval' property supplied to timer32Init.
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@param[in] timerNum
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The 32-bit timer to user (0..1)
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@param[in] delay
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The number of counter increments to wait
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*/
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/**************************************************************************/
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void timer32Delay(uint8_t timerNum, uint32_t delay)
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{
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uint32_t curTicks;
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if (timerNum == 0)
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{
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curTicks = timer32_0_counter;
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if (curTicks > 0xFFFFFFFF - delay)
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{
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// Rollover will occur during delay
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while (timer32_0_counter >= curTicks)
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{
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while (timer32_0_counter < (delay - (0xFFFFFFFF - curTicks)));
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}
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}
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else
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{
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while ((timer32_0_counter - curTicks) < delay);
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}
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}
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else if (timerNum == 1)
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{
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curTicks = timer32_1_counter;
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if (curTicks > 0xFFFFFFFF - delay)
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{
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// Rollover will occur during delay
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while (timer32_1_counter >= curTicks)
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{
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while (timer32_1_counter < (delay - (0xFFFFFFFF - curTicks)));
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}
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}
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else
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{
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while ((timer32_1_counter - curTicks) < delay);
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}
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Interrupt handler for 32-bit timer 0
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*/
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/**************************************************************************/
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void TIMER32_0_IRQHandler(void)
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{
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/* Clear the interrupt flag */
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TMR_TMR32B0IR = TMR_TMR32B0IR_MR0;
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/* If you wish to perform some action after each timer 'tick' (such as
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incrementing a counter variable) you can do so here */
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timer32_0_counter++;
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return;
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}
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/**************************************************************************/
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/*!
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@brief Interrupt handler for 32-bit timer 1
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*/
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/**************************************************************************/
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void TIMER32_1_IRQHandler(void)
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{
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/* Clear the interrupt flag */
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TMR_TMR32B1IR = TMR_TMR32B1IR_MR0;
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/* If you wish to perform some action after each timer 'tick' (such as
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incrementing a counter variable) you can do so here */
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timer32_1_counter++;
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return;
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}
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/**************************************************************************/
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/*!
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@brief Enables the specified timer
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@param[in] timerNum
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The 32-bit timer to enable (0..1)
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*/
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/**************************************************************************/
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void timer32Enable(uint8_t timerNum)
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{
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if ( timerNum == 0 )
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{
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TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_ENABLED;
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}
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else if (timerNum == 1)
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{
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TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_ENABLED;
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Disables the specified timer
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@param[in] timerNum
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The 32-bit timer to disable (0..1)
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*/
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/**************************************************************************/
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void timer32Disable(uint8_t timerNum)
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{
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if ( timerNum == 0 )
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{
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TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_DISABLED;
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}
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else if (timerNum == 1)
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{
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TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_DISABLED;
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Resets the specified timer
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@param[in] timerNum
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The 32-bit timer to reset (0..1)
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*/
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/**************************************************************************/
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void timer32Reset(uint8_t timerNum)
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{
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uint32_t regVal;
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if ( timerNum == 0 )
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{
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regVal = TMR_TMR32B0TCR;
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regVal |= TMR_TMR32B0TCR_COUNTERRESET_ENABLED;
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TMR_TMR32B0TCR = regVal;
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}
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else if (timerNum == 1)
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{
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regVal = TMR_TMR32B1TCR;
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regVal |= TMR_TMR32B1TCR_COUNTERRESET_ENABLED;
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TMR_TMR32B1TCR = regVal;
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Initialises the specified 32-bit timer, and configures the
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timer to raise an interrupt and reset on match on MR0.
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@param[in] timerNum
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The 32-bit timer to initiliase (0..1)
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@param[in] timerInterval
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The number of clock 'ticks' between resets (0..0xFFFFFFFF)
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@note Care needs to be taken when configuring the timers since the
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pins are all multiplexed with other peripherals. This code is
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provided as a starting point, but it will need to be adjusted
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according to your own situation and pin/peripheral requirements
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*/
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/**************************************************************************/
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void timer32Init(uint8_t timerNum, uint32_t timerInterval)
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{
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// If timerInterval is invalid, use the default value
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if (timerInterval < 1)
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{
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timerInterval = TIMER32_DEFAULTINTERVAL;
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}
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if ( timerNum == 0 )
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{
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/* Enable the clock for CT32B0 */
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SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B0);
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/* The physical pins associated with CT32B0 are not enabled by
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default in order to avoid conflicts with other peripherals. If
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you wish to use any of the pin-dependant functionality, simply
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uncomment the appropriate lines below. */
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/* Configure PIO1.5 as Timer0_32 CAP0 */
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// IOCON_PIO1_5 &= ~IOCON_PIO1_5_FUNC_MASK;
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// IOCON_PIO1_5 |= IOCON_PIO1_5_FUNC_CT32B0_CAP0;
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/* Configure PIO1.6 as Timer0_32 MAT0 */
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// IOCON_PIO1_6 &= ~IOCON_PIO1_6_FUNC_MASK;
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// IOCON_PIO1_6 |= IOCON_PIO1_6_FUNC_CT32B0_MAT0;
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/* Configure PIO1.7 as Timer0_32 MAT1 */
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// IOCON_PIO1_7 &= ~IOCON_PIO1_7_FUNC_MASK;
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// IOCON_PIO1_7 |= IOCON_PIO1_7_FUNC_CT32B0_MAT1;
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/* Configure PIO0.1 as Timer0_32 MAT2 */
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// IOCON_PIO0_1 &= ~IOCON_PIO0_1_FUNC_MASK;
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// IOCON_PIO0_1 |= IOCON_PIO0_1_FUNC_CT32B0_MAT2;
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/* Configure PIO0.11 as Timer0_32 MAT3 */
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/* Note: This pint can not be used with JTAG/SWD */
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// IOCON_JTAG_TDI_PIO0_11 &= ~IOCON_JTAG_TDI_PIO0_11_FUNC_MASK;
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// IOCON_JTAG_TDI_PIO0_11 |= IOCON_JTAG_TDI_PIO0_11_FUNC_CT32B0_MAT3;
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timer32_0_counter = 0;
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TMR_TMR32B0MR0 = timerInterval;
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/* Configure match control register to raise an interrupt and reset on MR0 */
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TMR_TMR32B0MCR = (TMR_TMR32B0MCR_MR0_INT_ENABLED | TMR_TMR32B0MCR_MR0_RESET_ENABLED);
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/* Enable the TIMER0 interrupt */
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NVIC_EnableIRQ(TIMER_32_0_IRQn);
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}
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else if ( timerNum == 1 )
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{
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/* Enable the clock for CT32B1 */
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SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B1);
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/* The physical pins associated with CT32B0 are not enabled by
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default in order to avoid conflicts with other peripherals. */
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/* Configure PIO1.0 as Timer1_32 CAP0 */
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/* Note: This pint can not be used with JTAG/SWD */
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// IOCON_JTAG_TMS_PIO1_0 &= ~IOCON_JTAG_TMS_PIO1_0_FUNC_MASK;
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// IOCON_JTAG_TMS_PIO1_0 |= IOCON_JTAG_TMS_PIO1_0_FUNC_CT32B1_CAP0;
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/* Configure PIO1.1 as Timer1_32 MAT0 */
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/* Note: This pint can not be used with JTAG/SWD */
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// IOCON_JTAG_TDO_PIO1_1 &= ~IOCON_JTAG_TDO_PIO1_1_FUNC_MASK;
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// IOCON_JTAG_TDO_PIO1_1 |= IOCON_JTAG_TDO_PIO1_1_FUNC_CT32B1_MAT0;
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/* Configure PIO1.2 as Timer1_32 MAT1 */
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/* Note: This pint can not be used with JTAG/SWD */
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// IOCON_JTAG_nTRST_PIO1_2 &= ~IOCON_JTAG_nTRST_PIO1_2_FUNC_MASK;
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// IOCON_JTAG_nTRST_PIO1_2 |= IOCON_JTAG_nTRST_PIO1_2_FUNC_CT32B1_MAT1;
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/* Configure PIO1.3 as Timer1_32 MAT2 */
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/* Note: This pint can not be used with JTAG/SWD */
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// IOCON_SWDIO_PIO1_3 &= ~IOCON_SWDIO_PIO1_3_FUNC_MASK;
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// IOCON_SWDIO_PIO1_3 |= IOCON_SWDIO_PIO1_3_FUNC_CT32B1_MAT2;
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/* Configure PIO1.4 as Timer1_32 MAT3 */
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// IOCON_PIO1_4 &= ~IOCON_PIO1_4_FUNC_MASK;
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// IOCON_PIO1_4 |= IOCON_PIO1_4_FUNC_CT32B1_MAT3;
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timer32_1_counter = 0;
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TMR_TMR32B1MR0 = timerInterval;
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/* Configure match control register to raise an interrupt and reset on MR0 */
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TMR_TMR32B1MCR = (TMR_TMR32B1MCR_MR0_INT_ENABLED | TMR_TMR32B1MCR_MR0_RESET_ENABLED);
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/* Enable the TIMER1 Interrupt */
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NVIC_EnableIRQ(TIMER_32_1_IRQn);
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}
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return;
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}
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