89 lines
1.6 KiB
Plaintext
89 lines
1.6 KiB
Plaintext
mainmenu_option next_comment
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comment "Borg16 port setup"
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#define COLPORT1 PORTC
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#define COLDDR1 DDRC
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#define COLPORT2 PORTA
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#define COLDDR2 DDRA
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#// Der andere Port übernimmt die Steuerung der Schieberegister
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#define ROWPORT PORTD
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#define ROWDDR DDRD
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#// Clock und reset gehen gemeinsam an beide Schieberegister
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#// der reset pin ist negiert
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#define PIN_RST PD4
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#define PIN_CLK PD6
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#//das dier sind die individuellen Dateneingänge für die Schieberegister
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#define PIN_SHFT1 PD7
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choice 'Column Port 1 (right)' \
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"PORTA PORTA \
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PORTB PORTB \
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PORTC PORTC \
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PORTD PORTD" \
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'PORTC' COLPORT1
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choice 'Column Port 2 (left)' \
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"PORTA PORTA \
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PORTB PORTB \
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PORTC PORTC \
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PORTD PORTD" \
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'PORTA' COLPORT2
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choice 'port for row shiftregisters' \
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"PORTA PORTA \
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PORTB PORTB \
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PORTC PORTC \
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PORTD PORTD" \
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'PORTD' ROWPORT
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comment "pin numbers on shiftregister port"
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choice '/MCLR Pin' \
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"Pin0 0 \
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Pin1 1 \
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Pin2 2 \
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Pin3 3 \
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Pin4 4 \
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Pin5 5 \
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Pin6 6 \
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Pin7 7" \
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'Pin4' PIN_MCLR
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choice 'CLK Pin' \
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"Pin0 0 \
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Pin1 1 \
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Pin2 2 \
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Pin3 3 \
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Pin4 4 \
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Pin5 5 \
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Pin6 6 \
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Pin7 7" \
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'Pin6' PIN_CLK
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choice 'DATA Pin' \
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"Pin0 0 \
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Pin1 1 \
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Pin2 2 \
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Pin3 3 \
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Pin4 4 \
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Pin5 5 \
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Pin6 6 \
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Pin7 7" \
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'Pin7' PIN_DATA
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comment "fixing hardwareproblems in software"
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bool "reverse cols" REVERSE_COLS n
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bool "invert rows " INVERT_ROWS n
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comment "for borg jacket"
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bool "interlaced rows" INTERLACED_ROWS n
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bool "interlaced cols" INTERLACED_COLS n
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endmenu
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