new hardware driver, still beta
This commit is contained in:
Hans-Gert Dahmen
parent
9c07418f23
commit
6325170d1c
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@ -1,7 +1,7 @@
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TARGET = libborg_hw.a
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TOPDIR = ..
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SRC_SIM :=
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SRC_SIM :=
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include $(TOPDIR)/defaults.mk
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@ -10,6 +10,10 @@ ifeq ($(BORG_HW),HW_BORG_16)
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SRC = borg_hw_borg16.c
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endif
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ifeq ($(BORG_HW),HW_BORG_16_HGM)
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SRC = borg_hw_borg16_hgmod.c
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endif
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ifeq ($(BORG_HW),HW_BORG_ANDRE)
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SRC = borg_hw_andreborg.c
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endif
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@ -0,0 +1,245 @@
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#include "../config.h"
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#include "../makros.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/wdt.h>
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#include "borg_hw.h"
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/*
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// those macros get defined via menuconfig, now
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*/
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#define TLC_PIN_SIN 0
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#define TLC_PIN_SCLK 1
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#define TLC_PIN_SOUT 5
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#define TLC_PIN_XLAT 2
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#define TLC_PIN_BLANK 3
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#define TLC_PIN_VPRG 7
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#define TLC_PIN_DCPRG 4
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#define TLC_PIN_XERR 6
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#define COLDDR DDR(COLPORT)
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#define ROWDDR DDR(ROWPORT)
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#define SCLK() { \
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COLPORT |= _BV(TLC_PIN_SCLK); \
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COLPORT &= ~_BV(TLC_PIN_SCLK); \
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}
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#define XLAT() { \
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COLPORT |= _BV(TLC_PIN_XLAT); \
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COLPORT &= ~_BV(TLC_PIN_XLAT); \
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}
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/* more ifdef magic :-( */
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#ifdef __AVR_ATmega644P__
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#define OCR0 OCR0A
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#define SIG_OUTPUT_COMPARE0 SIG_OUTPUT_COMPARE0A
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#endif
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// buffer which holds the currently shown frame
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unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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// switch to next row
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static void nextrow(uint8_t row) {
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unsigned char i;
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static unsigned char row = 0;
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//blank outputs of low-side (column) driver
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COLPORT |= _BV(TLC_PIN_BLANK);
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//increment & wrap row counter
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if (++row == NUM_ROWS) row = 0;
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// short delay loop, to ensure proper deactivation of the drivers
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for (i = 0; i < 10; i++) asm volatile("nop");
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// row 0: initialize first shift register
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if (row == 0)
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{
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#ifndef INVERT_ROWS
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ROWPORT &= ~(1 << PIN_MCLR);
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ROWPORT |= (1 << PIN_MCLR);
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ROWPORT |= (1 << PIN_DATA);
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ROWPORT |= (1 << PIN_CLK);
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ROWPORT &= ~(1 << PIN_CLK);
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ROWPORT &= ~(1 << PIN_DATA);
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#else
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ROWPORT&= ~(1<<PIN_DATA);
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ROWPORT|= (1<<PIN_CLK);
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ROWPORT&= ~(1<<PIN_CLK);
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ROWPORT|= (1<<PIN_DATA);
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#endif
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}
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// remaining rows: just shift forward
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else
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{
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ROWPORT |= (1 << PIN_CLK);
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ROWPORT &= ~(1 << PIN_CLK);
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}
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// another delay loop, to ensure that the drivers are ready
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for (i = 0; i < 20; i++) asm volatile("nop");
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}
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// show a row
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/*
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static void rowshow(unsigned char row, unsigned char plane) {
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// depending on the currently drawn plane, display the row for a specific
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// amount of time
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static unsigned char const ocr_table[] = {3, 4, 22};
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OCR0 = ocr_table[plane];
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// output data of the current row to the column drivers
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uint8_t tmp, tmp1;
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row = (row>>1) + ((row & 0x01)?8:0 );
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tmp = pixmap[plane][row][0];
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tmp1 = pixmap[plane][row][1];
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#ifdef REVERSE_COLS
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tmp = (tmp >> 4) | (tmp << 4);
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tmp = ((tmp & 0xcc) >> 2) | ((tmp & 0x33)<< 2); //0xcc = 11001100, 0x33 = 00110011
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tmp = ((tmp & 0xaa) >> 1) | ((tmp & 0x55)<< 1); //0xaa = 10101010, 0x55 = 1010101
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COLPORT2 = tmp;
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tmp = tmp1;
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tmp = (tmp >> 4) | (tmp << 4);
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tmp = ((tmp & 0xcc) >> 2) | ((tmp & 0x33) << 2); //0xcc = 11001100, 0x33 = 00110011
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tmp = ((tmp & 0xaa) >> 1) | ((tmp & 0x55) << 1); //0xaa = 10101010, 0x55 = 1010101
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COLPORT1 = tmp;
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#else
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COLPORT1 = tmp;
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COLPORT2 = tmp1;
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#endif
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}
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*/
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// depending on the plane this interrupt triggers at 50 kHz, 31.25 kHz or
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// 12.5 kHz
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SIGNAL(SIG_OUTPUT_COMPARE0) {
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uint8_t i, x;
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// reset watchdog
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wdt_reset();
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// switch rows
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nextrow(row);
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// output current row according to current plane
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//rowshow(row, plane);
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//debug: load 100% duty cycle into column driver
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for(i = 0; i < 16; i++) //16 x 12bit
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{
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//shift in 12 bit words
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for(x = 0; x < 12; x++)
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{
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COLPORT &= ~_BV(TLC_PIN_SIN);
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COLPORT |= ((uint8_t)((uint16_t)0xFFF >> x) & 1) << TLC_PIN_SIN;
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SCLK();
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}
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}
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//latch data and disable blanking
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XLAT();
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COLPORT &= ~_BV(TLC_PIN_BLANK);
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}
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void timer0_off() {
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cli();
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COLPORT = 0;
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ROWPORT = 0;
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#ifdef __AVR_ATmega644P__
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TCCR0A = 0x00;
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TCCR0B = 0x00;
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#else
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TCCR0 = 0x00;
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#endif
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sei();
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}
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// initialize timer which triggers the interrupt
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static void timer0_on() {
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/* TCCR0: FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
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* CS02 CS01 CS00
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* 0 0 0 stop
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* 0 0 1 clk
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* 0 1 0 clk/8
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* 0 1 1 clk/64
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* 1 0 0 clk/256
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* 1 0 1 clk/1024
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*/
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#ifdef __AVR_ATmega644P__
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TCCR0A = 0x02; // CTC Mode
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TCCR0B = 0x04; // clk/256
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TCNT0 = 0; // reset timer
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OCR0 = 20; // compare with this value
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TIMSK0 = 0x02; // compare match Interrupt on
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#else
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TCCR0 = 0x0C; // CTC Mode, clk/256
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TCNT0 = 0; // reset timer
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OCR0 = 20; // compare with this value
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TIMSK = 0x02; // compare match Interrupt on
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#endif
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}
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void tlc5940_init()
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{
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uint8_t i;
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//init control port pins
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COLDDR = 0x00;
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COLDDR = _BV(TLC_PIN_SCLK) | _BV(TLC_PIN_SIN)
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| _BV(TLC_PIN_XLAT) | _BV(TLC_PIN_BLANK)
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| _BV(TLC_PIN_VPRG) | _BV(TLC_PIN_DCPRG);
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//switch off all outputs and pull-ups
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//xerr is open-drain, enable PUP
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//set blank flag (disable led-outputs)
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//dcprog is high -> use values from dc register
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//vprg is high -> dot correction mode mode
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COLPORT = _BV(TLC_PIN_XERR) | _BV(TLC_PIN_BLANK) | _BV(TLC_PIN_DCPRG) | _BV(TLC_PIN_VPRG);
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//set max power (6bit * 16 LEDs)
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COLPORT |= _BV(TLC_PIN_SIN);
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for(i = 0; i < 96; i++) SCLK();
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XLAT();
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//switch to grayscale mode
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COLPORT &= ~_BV(TLC_PIN_VPRG);
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//flush input shift register (12bit * 16 LEDs)
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COLPORT &= ~_BV(TLC_PIN_SIN);
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for(i = 0; i < 192; i++) SCLK();
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XLAT();
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//one extra clk pulse is needed after switching from dc mode
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SCLK();
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}
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void borg_hw_init() {
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//init column driver
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tlc5940_init();
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// switch pins of the row port to output mode
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ROWDDR = (1 << PIN_MCLR) | (1 << PIN_CLK) | (1 << PIN_DATA);
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// reset shift registers for the rows
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ROWPORT = 0;
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//activate the activator
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timer0_on();
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// activate watchdog timer
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wdt_reset();
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wdt_enable(0x00); // 17ms watchdog
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}
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