2011-05-08 20:58:56 +00:00
|
|
|
#include "../config.h"
|
|
|
|
#include "../makros.h"
|
|
|
|
#include "../ioport.h"
|
|
|
|
|
|
|
|
#include <avr/interrupt.h>
|
|
|
|
#include <avr/io.h>
|
|
|
|
#include <avr/wdt.h>
|
|
|
|
#include "borg_hw.h"
|
|
|
|
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
// buffer which holds the currently shown frame
|
2011-05-08 20:58:56 +00:00
|
|
|
unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
|
|
|
|
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
// display a row
|
|
|
|
inline void rowshow(unsigned char row) {
|
|
|
|
// output data of the current row to the column drivers
|
|
|
|
COLPORT1 = pixmap[0][row][0];
|
|
|
|
COLPORT2 = pixmap[0][row][1];
|
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
OUTPUT_ON(LATCH_R);
|
|
|
|
OUTPUT_OFF(LATCH_R);
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
COLPORT1 = pixmap[1][row][0];
|
|
|
|
COLPORT2 = pixmap[1][row][1];
|
2011-05-08 20:58:56 +00:00
|
|
|
|
|
|
|
OUTPUT_ON(LATCH_G);
|
|
|
|
OUTPUT_OFF(LATCH_G);
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
COLPORT1 = pixmap[2][row][0];
|
|
|
|
COLPORT2 = pixmap[2][row][1];
|
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
OUTPUT_ON(LATCH_B);
|
|
|
|
OUTPUT_OFF(LATCH_B);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
uint32_t mod = 1280000ul;
|
|
|
|
uint32_t akku;
|
|
|
|
|
|
|
|
unsigned char row = 0;
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
|
2012-03-23 01:27:59 +00:00
|
|
|
ISR(TIMER0_COMP_vect)
|
2011-05-08 20:58:56 +00:00
|
|
|
{
|
2011-08-17 01:16:25 +00:00
|
|
|
// reset watchdog
|
2011-05-08 20:58:56 +00:00
|
|
|
wdt_reset();
|
2011-08-17 01:16:25 +00:00
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
akku += mod;
|
2011-08-17 01:16:25 +00:00
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
OCR1A = akku / 256;
|
|
|
|
|
|
|
|
rowshow(row);
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
if (++row == NUM_ROWS) {
|
2011-05-08 20:58:56 +00:00
|
|
|
row = NUM_ROWS - 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
ISR(INT0_vect) {
|
|
|
|
if (akku > (64ul * 256ul * 64ul)) {
|
2011-05-08 20:58:56 +00:00
|
|
|
akku -= OCR1A - TCNT1;
|
2011-08-17 01:16:25 +00:00
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
mod = akku / 64;
|
|
|
|
akku = 0;
|
|
|
|
row = 0;
|
|
|
|
OCR1A = 0;
|
|
|
|
TCNT1 = 0xffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
void timer0_off() {
|
2011-05-08 20:58:56 +00:00
|
|
|
cli();
|
|
|
|
TCCR1B = 0x00;
|
|
|
|
sei();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
// initialize timer which triggers the interrupt
|
|
|
|
void timer1_on() {
|
|
|
|
TCCR1B = 1; // clk/1
|
|
|
|
TIMSK |= (1 << OCIE1A);
|
2011-05-08 20:58:56 +00:00
|
|
|
}
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
|
|
|
|
void borg_hw_init() {
|
2011-05-08 20:58:56 +00:00
|
|
|
DDR(COLPORT1) = 0xff;
|
|
|
|
DDR(COLPORT2) = 0xff;
|
2011-08-17 01:16:25 +00:00
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
SET_DDR(LATCH_R);
|
|
|
|
SET_DDR(LATCH_G);
|
|
|
|
SET_DDR(LATCH_B);
|
2011-08-17 01:16:25 +00:00
|
|
|
|
2011-05-08 20:58:56 +00:00
|
|
|
timer1_on();
|
|
|
|
|
2011-08-17 01:16:25 +00:00
|
|
|
// activate watchdog timer
|
2011-05-08 20:58:56 +00:00
|
|
|
wdt_reset();
|
2011-08-17 01:16:25 +00:00
|
|
|
wdt_enable(0x00); // 17ms watchdog
|
2011-05-08 20:58:56 +00:00
|
|
|
}
|